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The Caspia Technologies team is proud to announce that two of our co-founders, Dr. Mark Tehranipoor and Dr. Farimah Farahmandi, will be attending the VLSI-SoC’24 Conference in Morocco.
Dr. Tehranipoor will deliver the keynote presentation on “Secure Heterogeneous Integration and Advanced Packaging: New Attack Surfaces and Grand Challenges Ahead,” while Dr. Farahmandi will present two papers.
Dan is joined by Dr. Walden Rhines. Wally is a lot of things, CEO of Cornami, board member, advisor to many and friend to all. In this conversation, Wally discusses his decision to join Caspia Technologies as Chairman of the Board.You can read the press release announcing this here:
Read more and listen to the podcast here:
GAINESVILLE, Fla., Sept. 4, 2024 /PRNewswire/ — Caspia Technologies — a pioneer in the development of hardware security verification for modern SoCs and electronic components today announced the addition of three executives to its management team. Richard Hegberg joins the company as CEO, Marc Corbacho as CRO and Dr. Jeremy Lee as VP of engineering.
“Based upon my prior history, I have the highest confidence in Rick and Marc. Along with Jeremy, this team brings a wealth of knowledge about chip and system design, along with a deep appreciation for the importance of hardware security,” said Dr. Walden Rhines, chariman of the board at Caspia Technologies. “We are facing a new era of design challenges that stem from highly sophisticated cyberattacks that are fueled by AI. It is time to add security verification to chip and system design, and that is Caspia’s mission.”
Richard Hegberg is the former CEO of three semiconductor start-ups. He has held executive roles at SanDisk/WD, Qualcomm, Atheros, Numonyx/Micron, ATI/AMD, and VLSI Technology. Marc Corbacho is the former VP of sales at Mentor Graphics, now Siemens EDA. Dr. Jeremy Lee holds a Ph.D. in Electrical and Computer Engineering from the University of Connecticut. He has a broad background in testability and design for test at Texas Instruments and Anora Labs.
Logic verification has always been a critical part of the chip and system design flow. It represents about 50% of the overall design investment. A new dimension of design robustness is now emerging – resilience to cyberattacks. Thanks to emerging AI technology, the ability to compromise system hardware with the goal of either inflicting harm or stealing valuable data is rapidly expanding. The need to add hardware security verification alongside logic verification is now a requirement for success. Caspia Technologies is leading the way with the industry’s first end-to-end security verification EDA tool suite.
“For many years, security resilience was important primarily in military applications,” said Rick Hegberg. “Thanks to a combination of the value of data, the mission-critical nature of almost all system hardware, and AI-enhanced intrusion capabilities, the security threat is now ubiquitous. I am excited to introduce the industry’s first end-to-end security verification flow – the work at Caspia will change the course of semiconductor history.”
About Caspia Technologies
Founded in 2020 and headquartered in Gainesville, Florida, Caspia Technologies is a privately held company that is pioneering a holistic approach to chip and system security verification. Caspia’s founding team brings together over 75 years of experience in various fields of the semiconductor market, including design, fabrication, test, EDA development, and importantly security and trust. Caspia delivers security-focused solutions to both public and private customers to enhance electronic designs and microelectronics physical hardware assurance.
The Caspia Technologies Team is honored to announce that one of our founders, Dr. Farimah Farahmandi, has received the ACM/IEEE DAC Under 40 Innovators Award. This award recognizes up to five young innovators worldwide, under 40 years old, who are making significant contributions and shaping the future of the design automation field in industry, research labs, start-ups and academia.Dr. Farahmandi was recognized for her outstanding work in Hardware Security Verification and Validation. Her innovative solutions in security verification are the backbone of many of Caspia’s products.
DAC24 dinner and panel discussion, “Redefining Innovation in Chip Design with GenAI“ took place at the Waterbar in SF on Monday night.
Dr. Wally Rhines, Chairman of the Board for Caspia Technologies, took part in the panel discussion hosted by Cadence, AWS and NetApp. The panel took questions and had a discussion around how the semiconductor industry is on the brink of a transformative era driven by the convergence of Generative AI (GenAI) and data-driven insights.
As the digital landscape evolves, GenAI coupled with a robust data strategy, unlocks unprecedented opportunities and security challenges driving growth, innovation, and competitive advantage across multiple facets of the semiconductor industry. The former Mentor Graphics CEO and EDA icon outlined the need for a new EDA tool flow based around security tools that find vulnerabilities early in the process and avoid costly escapes.
GAINESVILLE, Fla., June 4, 2024 /PRNewswire/ — Caspia Technologies — a pioneer in the development of a Secure Development Lifecycle (SDL) for modern SoCs and electronic components today announced that semiconductor and EDA industry veteran Dr. Walden (Wally) C. Rhines has joined the company as Chairman. The addition of Wally to the management team will help accelerate the deployment of Caspia’s revolutionary assurance optimization capabilities to a broad range of commercial designs.
Developed by a group of world-class university researchers, the company’s SDL approach for SoCs includes early risk assessment, secure architecture and policies during planning and application of an extensive set of design practices to optimize system security. Comprehensive assurance verification and validation is then applied to create end-to-end guidance, resolving intra- and inter-stage vulnerabilities with quantified results.
The approach has been validated through multiple government-sponsored programs and is now ready to deploy for commercial SoC designs. The company’s first EDA product, CODAx, performs early analysis to identify and fix a wide range of design practices that can lead to security weaknesses and potential breaches.
Caspia is responding to the increasing incidence of costly and potentially dangerous cybersecurity attacks that are compromising both system software and hardware. The massive data sets and models that drive the ubiquitous use of AI are becoming a high-profile target for cyber criminals. According to Forbes, 2023 saw a 72% increase in data breaches since 2021, which held the previous all-time record.
Traditional security enhancement methods focus on analysis of the data, network, operating system, software and associated firmware of the system. The underlying hardware (integrated circuits) that run these systems is assumed to be secure and trusted. The Caspia SDL methodology for SoC design ensures the system hardware is optimized to resist a wide range of security threats.
Caspia draws from many security sources, including CVE, CWE, and Trust-Hub. Beyond that, the Caspia founding team is advancing threat analysis and design techniques through the group’s advanced research and leadership across the industry.
“I am proud of the progress the Caspia team has made in the development of a fundamentally new approach to system assurance enhancement,” said Dr. Mark Tehranipoor, co-founder/advisor for Caspia Technologies and Department Chair & Intel Charles E. Young Chair in Cybersecurity at the University of Florida’s Electrical and Computer Engineering Department. “The holistic SDL approach to assurance optimization will have significant impact. I am absolutely delighted that Wally Rhines has joined our team. His extensive knowledge and experience in semiconductors and EDA will be invaluable.”
“Data security and assurance at both the hardware and software levels is critically important for continued semiconductor innovation. I’ve been actively involved with the government and through Cornami to address this problem,” said Wally Rhines. “Caspia’s SDL for SoC design is the most comprehensive approach to security and assurance optimization I have seen. It will be a game-changer. I’m delighted to help the Caspia team find its place in history.”
Caspia Technologies is developing a complete suite of tools, IP, and training to address security flaws at the source. New product announcements will be coming soon.
About Caspia Technologies
Founded in 2020 and headquartered in Gainesville, Florida, Caspia Technologies is a privately held company that is pioneering a holistic approach to SoC security and assurance, known as the Secure Development Lifecycle (SDL). Caspia’s founding team brings together over 75 years of experience in various fields of the semiconductor market, including design, fabrication, test, EDA development, and importantly security and trust. Caspia delivers security-focused solutions to both public and private customers to enhance electronic designs and microelectronics physical assurance.
Media Contact:
Steve Galette
(954) 394-2486
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