About Us
Our Company
Caspia Technologies simplifies the adoption of security practices into the demanding silicon development lifecycle, with offerings that include tools that fit in your EDA flow for pre-silicon security verification, dedicated plug-and-play security IP solutions, physical assurance methodologies, as well as training and curriculum development on hardware security topics. These offerings fit within our Secure Development Lifecycle framework aimed to enhance the adoptability of a hardware security mindset and its necessary processes to ensure safe and secure products for customers and partners.
Caspia’s flagship product, CODAx, is a SoC/IP security verification tool that identifies security weaknesses existing in RTL code. This is done through a simple and fully automated linter that checks for over 120 security rules that are derived from databases like CWE. Additional solutions in development include pre-silicon fault injection vulnerability assessment (AFIx) and pre-silicon side-channel susceptibility analysis (SCMx) to help identify silicon security issues before fabrication. These end-to-end offerings enable a holistic security posture and assist with security-related standard/regulation compliance, such as ISO 21434.
MANAGEMENT TEAM
Caspia was founded in 2020 by founders with over 75 years of combined experience in semiconductor design, fabrication, test, and importantly security and trust. They are based out of Gainesville, FL with 15+ employees.
Leadership
Founders
Walden “Wally” C. Rhines is currently president and CEO of Cornami, Inc. as well as Chairman of Caspia Technologies. Previously, he was CEO of Mentor Graphics for 25 years and Chairman of the Board for 17 years. During his tenure at Mentor, revenue nearly quadrupled and market value of the company increased 10X.
Prior to joining Mentor Graphics, Dr. Rhines spent 21 years at TI in various executive management roles. He has served on the board of directors for Cirrus Logic, QORVO, TriQuint Semiconductor, Global Logic, PTK Corp., SRC and as Chairman of the Electronic Design Automation Consortium (five two-year terms). He is a Lifetime Fellow of the IEEE and has served on the Board of Trustees of Lewis and Clark College, the National Advisory Board of the University of Michigan and Industrial Committees advising Stanford University and the University of Florida.
He holds a BS degree in engineering from the University of Michigan, and an MS and PhD in materials science and engineering from Stanford University, a Master of Business Administration from Southern Methodist University and an Honorary Doctor of Technology degrees from the University of Florida and Nottingham Trent University.
