As System-on-Chip (SoC) designs grow increasingly complex, manually developing security policies and verification strategies becomes difficult to scale. SoCureLLM explores the use of Large Language Models (LLMs) to automate key aspects of SoC security verification, including security policy generation and the identification of potential vulnerabilities across complex hardware designs. The approach demonstrates how AI can help translate security requirements into actionable verification policies, reducing manual effort while improving the scalability and consistency of security analysis. This research highlights the potential for LLM-driven automation to accelerate hardware security verification and enable security to be addressed earlier and more systematically in the chip design lifecycle.